The Mumbai-based institute’s work, built under the Chips to Startup programme and fabricated at SCL Mohali, became part of India’s semiconductor showcase in Bengaluru attended by Prime Minister Narendra Modi
VESIT students break new ground with chip design selected for Semicon India 2025
Student engineers from Vivekanand Education Society’s Institute of Technology (VESIT) have entered uncharted territory for a private college in Maharashtra. Their indigenously designed integrated circuit was among the projects featured at Semicon India 2025, the country’s flagship platform for semiconductor self-reliance.
Faculty members at VESIT said the project was carried out by a student team working under the mentorship of the electronics department. The design, they explained, is aimed at bridging the gap between theoretical learning and practical semiconductor development, a gap that is often only filled at IITs or public research institutions.
The institute, affiliated with the University of Mumbai but operating as an autonomous entity, described the opportunity as proof of what student-led innovation can achieve when supported by national programmes like C2S.
India semiconductor mission student innovation VESIT chip PM Narendra Modi inaugurates Semicon India 2025 VESIT chip Smruti Bhalerao editorial coverage VESIT Semicon India 2025 chip VESIT C2S programme indigenously designed chip India VESIT chip Semicon India 2025 student project VESIT Mumbai Chips to Startup programme chip design VESIT private engineering college Maharashtra Semicon India chip VESIT SCL Mohali chip fabrication CMOS 180 nm VESIT students chip design presented at Semicon India 2025 VESIT University of Mumbai autonomous institute chip Semicon India 2025
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